Factory custom News S905X3 Tv Box

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Not long ago, we received news from Amlogic, some parameters of S905X3, made a new Android tv box design for amlogic S905X3 chip H96, upgraded from S905X, S905X2, 2019 to S905X3. After information and testing, the following are the parameters of the S905X3 chip.
Amlogic S905X3 specifications:

CPU Sub-system
Quad core Arm Cortex-A55 CPU with Armv8-A Neon and Crypto extension, 8-stage in-order full dual issue pipeline, unified system L3 cache
Arm Cortex-M3 core for system control processing
Optional Arm Cortex-M4 core for always-on processing
Internal QoS based switching fabrics
Optional Neural Network Accelerator – 1.2 TOPS NN inference accelerator supporting TensorFlow and Caffe
3D Graphics Processing Unit – Arm Mali G31MP2 GPU with support for OpenGL ES 3.2, Vulkan 1.0 and OpenCL 2.0 support
2.5D Graphics Processor
Fast bitblt engine with dual inputs and single output
Programmable raster operations (ROP)
Programmable polyphase scaling filter
Support for 4:2:0, 4:2:2, and 4:4:4 video formats, and multiple pixel formats (8/16/24/32 bits graphic layer)
Fast color space conversion
Advanced anti-flickering filter
Crypto Engine
AES block cipher with 128/256 bits keys
TDES block cipher with ECB and CDC modes
SM4 block cipher with ECB, CBC, CTR modes
Hardware crypto key-ladder operation and DVB-CSA for transport stream encryption
TRNG, CRC and SHA-1/SHA-2/HMAC SHA engine
Video/Picture CODEC
Amlogic Video Engine (AVE) with dedicated hardware decoders and encoders
Support multi-video decoder up to 4x 1080p60
Support multiple secured video decoding sessions and simultaneous decoding and encoding
Video/Picture Decoding
VP9 Profile-2 up to 4Kx2K @ 60 fps
H.265 HEVC MP-10 @ L5.1 up to 4Kx2K @ 60 fps
AVS2-P2 Profile up to 4Kx2K @ 60 fps
H.264 AVC HP @ L5.1 up to 4Kx2K @ 30 fps
MPEG-4 ASP @ L5, WMV/VC-1, AVS-R16/AVS-R2 JiZhun Profile, MPEG-2, MPEG-1, and RealVideo 8/9/10 up to 1080p60
Multiple language and multiple format sub-title video support
MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918)
Support JPEG thumbnail, scaling, rotation and transition effects
Supports mkv, wmv, mpg, mpeg, dat, avi, mov, iso, mp4, rm, and jpg file formats
Video/Picture Encoding
Independent JPEG and H.264 encoder with configurable performance/bitrate
JPEG image encoding
H.265/H.264 video encoding up to 1080p60 with low latency
8th Generation Advanced Amlogic TruLife Image Engine
Supports Dolby Vision (optional), HDR10+, HDR10, HLD and Technicolor HDR processing
Motion compensated noise reduction, and 3D digital noise reduction for random noise
Block noise, mosquito noise, spatial noise, contour noise reduction
Motion compensated and motion adaptive de-interlacer
Edge interpolation with low angle protection and processing
Smart sharpness with Superscalar technology including de-contouring, de-ring, LTI, CTI, de-jaggy, peaking
Dynamic non-linear contrast enhancement
All dimension multiple regions smart color management including blue/green extension, flesh-tone correction, wider gamut for video
2 video planes and 3 graphics planes hardware composer
Independent HDR re-mapping of video and graphic layer
Video Input/Output Interface
Built-in HDMI 2.1 transmitter including both controller and PHY supporting CEC, Dynamic HDR and HDCP 2.2, 4Kx2K @ 60 Hz max resolution output, ALLM (Auto Low Latency Mode)
CVBS 480i/576i standard definition output
Support all standard video output formats: 480i/p, 576i/p,. 720p, 1080i/p, 4Kx2K
Audio Decoder and Input/Output
Supports MP3, AAC, WMA, RM, FLAC, Ogg and programmable with 7.1/5.1 down-mixing
Low-power VAD (Voice Activity Detection)
Built-in serial digital audio SPDIF/IEC958 input/output and PCM input/output
3x TDM/PCM/I2S ports with TDM/PCM mode up to 384 KHz x 32 bits x 16ch or 96 KHz x 32 bits x 32 ch, and I2S mode up to 384 KHz x 32 bits x 16 ch
Digital microphone PDM input with programmable CIC, LPF & HPF, support up to 8 DMICs
Built-in Stereo audio DAC
Supports concurrent dual audio stereo channel output with combination of analog+PCM or I2S + PCM
Memory & Storage Interface
32-bit DRAM memory interface with dual ranks and max 4GB total address space
Compatible with JEDEC standard DDR3-2133 / DDR3L-2133 / DDR4-3200 / LPDDR3-2133 / LPDDR4-3200 SDRAM
Support SLC/LMC/TLC NAND flash with 60-bit ECC
SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting up to UHS-I SDR104 mode
eMMC and MMC card interface with 1/4/8-bit data bus width supporting spec version 5.0 HS400
Support serial 1, 2 or 4-bit NOR flash via SPI
Built-in 4k bits One-Time-Programming memory for key storage
Integrated 10/100/1000M Ethernet MAC with RGMII interface
Integrated 10/100M Ethernet PHY interface
WiFi & Bluetooth supported via PCIe, SDIO, USB, UART, or PCM
Network interface optimized for mixed WiFi and Bluetooth traffic
Digital Television Interface
One serial and one parallel Transport Stream (TS) input interface with built-in demux processor for connecting to external digital TV tuner/demodulator
Built-in PWM, I2C and SPI interfaces to control tuner and demodulator
Integrated ISO7816 smart card controller
Integrated I/O controllers and interfaces
1x USB XHCI OTG 2.0 port
One USB SS and PCIe 2.0 combo port up to 5 Gbps configurable with either:
1x USB 2.0 host port + PCIe
1x USB 3.0 without PCIe
Multiple PWM, UART, I2C and SPI interfaces with slave select
Programmable IR remote input/output controllers
Built-in 10-bit SAR ADC with 4 input channels
GPIOs with built-in pull up and pull down
System, Peripherals and Misc. Interfaces
Integrated general purpose timers, counters, DMA controllers
24 MHz crystal input
Embedded debug interface using ICE/JTAG
Integrated Power On Reset (POR) module
Power Management
Multiple internal power domains controlled by software
Multiple sleep modes for CPU, system, DRAM, etc..
Multiple internal PLLs for DVFS operation
Multi-voltage I/O design for 1.8V and 3.3V
Power management auxiliary processor in a dedicated always-on (AO) power domain that communicate with an external PMIC
TrustZone based Trusted Execution Environment (TEE)
Secured boot, encrypted OTP, encrypted DRAM with memory integrity checker, hardware key ladder and internal control buses and storage
Separated secure/non-secure Entropy true RNG
Pre-region/ID memory security control and electric fence
Hardware based Trusted Video Path (TVP), video watermarking and secured contents (needs SecureOS software)
Secured IO and secured clock
Package – FCBGA, 14 x 14mm, RoHS compliant
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